AMD Docs Confirm AM5 Upgrade Path To Zen 6 Olympic Ridge And Medusa1

The discovery comes from a leak identified by InstLatX64, who managed to capture screenshots of AMD's internal processor mapping before the data was seemingly removed. The documentation explicitly lists Medusa1 associated with the FP10 platform and Olympic Ridge for the AM5 socket. This confirms that at least two different Zen 6 client families will be available to consumers, mirroring the Granite Ridge and Strix Point dichotomy seen in the previous Zen 5 generation.

Olympic Ridge is positioned as the standard desktop family for Zen 6. Based on current leaks and architectural trends, these processors are expected to maintain a chiplet design similar to their predecessors, featuring one or two Core Complex Dies (CCDs) attached to a Chiplet I/O die (cIOD). The generation brings significant internal improvements: the CCDs are reported to include four additional cores compared to Zen 5, and L3 cache capacity has increased by 50%. Top-end configurations could reach up to 24 cores with 96MB of L3 cache, excluding any potential 3D V-Cache variants.

A key architectural shift for Olympic Ridge is the introduction of a fully new I/O die. This update promises enhanced connectivity, including improved graphics capabilities, updated PCI Express lanes, and revised USB interfaces. These changes ensure that Zen 6 desktop CPUs will offer better integration with next-generation peripherals and displays compared to the current generation.

Medusa1 represents a different segment of the product lineup, targeting mobile devices such as laptops and handhelds. While Medusa2 is confirmed for the FP10 socket (likely for smaller or more power-constrained devices), Medusa1 appears to be the primary mobile offering for Zen 6. This aligns with rumors suggesting a modular architecture where the base die includes a mix of high-performance 'Classic' and efficiency-focused 'Dense' cores, alongside more powerful integrated graphics than the basic display adapter found in desktop parts.

The documentation also notes that Medusa2 is limited to the FP10 platform, which is an interesting detail given previous rumors suggesting its cancellation. The inclusion of Medusa1 on AM5 motherboards raises questions about its intended use case. While the base Medusa Point die is said to have ten CPU cores (four Zen 6, four Zen 6C, and two Zen 6 LP), adding a full-fat Zen 6 CCD could theoretically push the core count up to 22. However, enthusiasts seeking maximum performance might still prefer the homogenous configuration of the 20 or 24-core Olympic Ridge parts, which offer superior single-core and multi-core performance alongside the new I/O capabilities.

This confirmation provides clarity for users planning to upgrade their systems. The AM5 platform is set to receive a significant refresh with Zen 6, offering not just a raw performance bump but also architectural improvements in connectivity and cache management. Whether Medusa1 will be standard on AM5 motherboards or remain optional remains to be seen, but its presence in the official documentation marks a definitive step forward for AMD's desktop roadmap.