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Hardware 18 October 2026 • 2 min read •

Intel Inference Microservices: Optimizing LLMs on Xeon via Profiles

Intel has introduced a containerized solution to run large language models on Xeon processors using automatically optimized hardware profiles.
Author: Гика • PC •
Intel Inference Microservices: Optimizing LLMs on Xeon via Profiles

Intel has unveiled Inference Microservices, a containerized solution designed to streamline the deployment of large language models (LLMs) on Xeon server processors. The core value proposition is the automatic selection of optimized settings tailored to specific processor architectures, reducing the manual configuration required to leverage CPU-based AI acceleration.

Automated Hardware Profiling

Running LLMs on CPUs requires precise alignment between software and hardware. Performance is dictated not just by core counts, but by memory architecture, instruction set extensions, and NUMA topology. Intel aims to mitigate this complexity by providing containers that detect the specific Xeon generation, available cores, and relevant hardware features upon startup.

Rather than performing a real-time exhaustive measurement of every possible configuration, the software utilizes pre-validated performance profiles created by Intel for specific processor and model combinations. If a matching hardware configuration is not detected, the startup process for model-specific containers will fail by default, though a general base container remains available for compatible systems using a less specific profile.

Technical Specifications and API

The solution utilizes the vLLM inference engine and provides model access through an OpenAI-compatible API. This ensures high compatibility with existing frameworks and tools such as LangChain, LlamaIndex, LiteLLM, and the OpenAI SDK. The initial release focuses on the BF16 (Bfloat16) data format, which is widely used in AI computing due to its wide dynamic range despite reduced precision.

To accelerate the heavy matrix operations inherent in neural networks, the microservices leverage Intel AMX (Advanced Matrix Extensions), alongside AVX-512, AVX2, and VNNI. The availability of these specific acceleration features depends entirely on the underlying CPU architecture.

Roadmap and Limitations

While these microservices simplify deployment, they are not a replacement for dedicated AI GPUs. Real-world performance remains heavily dependent on memory bandwidth, model size, and concurrent requests (a minimum of 32 GB of RAM is recommended). Additionally, while vLLM supports features like Tool Calling and structured outputs, these are not explicitly validated in the current version of the microservices.

Looking ahead, Intel plans to extend support to Intel GPUs, including data center inference accelerators codenamed Crescent Island. This expansion aims to provide a unified API, allowing developers to run the same applications across different Intel hardware platforms without needing to rewrite their integration logic.

Article author

Гика

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