800V to 6V: Microchip and Navitas Develop Compact GaN Power for AI Servers
While the focus in AI accelerators often remains on compute power and memory bandwidth, power delivery is becoming an equally complex challenge. At the OCP Global Summit, Microchip Technology and Navitas Semiconductor introduced a new reference design capable of stepping down 800V DC to 6V DC, aimed at meeting the massive power demands of next-generation AI servers.
GaN Technology and Conversion Architecture
The primary goal of this development is to bring voltage conversion closer to the actual load (GPUs or CPUs), thereby reducing losses in power distribution lines and connectors. The reference design utilizes 16 Navitas NV6034 GaNFast transistors, each rated for 650V. To handle the 800V input, the engineers implemented a stacked half-bridge topology to distribute the voltage stress across multiple components.
By leveraging Gallium Nitride (GaN) instead of traditional silicon, the system can operate at a high switching frequency of 1 MHz. This allows for significantly smaller passive components, such as transformers and filters. The manufacturers claim the module is exceptionally slim, with a height roughly 20% of a smartphone's thickness.
Efficiency and Power Density Targets
The manufacturers have outlined the following target specifications for the reference design:
- Peak efficiency: up to 96%;
- Power density: 2,100 W/in³;
- Switching frequency: 1 MHz.
It is important to clarify that the "direct" 800V-to-6V conversion refers to the integration of two voltage stages (800V $\rightarrow$ 50V and 50V $\rightarrow$ 6V) within a single hardware unit. This integration helps shorten low-voltage lines, which is critical when dealing with the massive currents required by modern AI chips.
Control and Security
The core of the voltage conversion control is a 32-bit digital signal controller from the Microchip dsPIC33AK family (dsPIC33AK256MPS306 series) running at 200 MHz. It features high-resolution PWM modules with a 78-picosecond resolution, essential for managing rapid load changes. For security and firmware protection, the design includes a Microchip TA100 CryptoAuthentication chip.
It should be noted that these figures represent the target specifications of the reference design. Independent measurements documenting actual efficiency and power loss under all operating conditions have not yet been released.
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