CXMT Begins HBM3E Risk Production
CXMT has reportedly initiated risk production of HBM3E memory, marking a significant step for Chinese DRAM manufacturing according to a report by The Information. While the company remains a generation behind the leading memory producers who are already mass-producing HBM4, reaching the HBM3E milestone demonstrates rapid technological progress in the sector.
The specific specifications of CXMT's HBM3E products are currently unknown. Since this involves risk production, the characteristics of the final commercial products may differ from the current samples. However, general JEDEC standards for HBM3E are well established: the modules feature a 1,024-bit-wide memory interface, support data transfer rates up to 9.6 GT/s per pin, and can stack 8 or 12 memory devices. Depending on the exact speed bins, HBM3E can provide up to 1.228 TB/s of memory bandwidth.
Capacity depends on the number of DRAM dies used in the stack. HBM3E products can offer 24GB of capacity using an eight-die stack or 36GB using a 12-die stack when built with 24Gb DRAM devices. CXMT could potentially initiate mass production of this memory in 2027, according to the report.
Strategic significance of HBM3E production
The manufacturing of HBM3E by CXMT is important for multiple reasons, and arguably the HBM3E generation itself matters less than CXMT's ability to manufacture usable HBM at all. Firstly, HBM is one of the critical components of modern AI accelerators. If CXMT's HBM3E qualifies with processors from Cambricon, T-Head, and other Chinese designers, China becomes less dependent on Micron, Samsung, and SK hynix for building high-performance AI hardware.
Secondly, despite being a generation behind HBM4, HBM3E is still very capable memory and can provide several TB/s of bandwidth, which is sufficient for powerful AI accelerators. Many Chinese developers of AI accelerators do not necessarily need HBM4 or HBM4E to build useful AI systems.
Thirdly, HBM is substantially harder to produce than ordinary DRAM. CXMT needs not only competitive DRAM dies, but also high-yield stacking, through silicon vias (TSVs), very fine interconnects, thermal management, packaging, and testing. Reaching HBM3E risk production proves that China's memory ecosystem is advancing beyond simply manufacturing commodity DRAM.
Finally, there is an important geopolitical angle. Export restrictions constrain China's access to advanced AI processors and HBM. A combination of Chinese-designed accelerators, CXMT HBM3E, and advanced domestic packaging indicates that China is becoming one step closer to semiconductor self-sufficiency. This development is particularly relevant as AI data centers consume considerable DRAM manufacturing capacity, a scenario where CXMT's aggressive capacity expansion could be useful.
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