AMD Zen 6: Peripheral Optimizations to Tackle Micro-Stutters

Instead of just chasing higher IPC or clock speeds, AMD appears to be implementing various per-core optimizations to manage the silicon's thermal and power budgets more intelligently. Let's break down the key features tipped for Zen 6.

Task Prioritization and Power Management

First up is CPPC Performance Priority. CPPC stands for Collaborative Processor Performance Control, responsible for communication between the silicon and the OS. It allows firmware to decide the performance of each core separately. While this feature has existed since the Ryzen 3000 series, Zen 6 CPUs are tipped to apply a fix to improve its effectiveness.

Secondly, we have FloorPerf, which acts as a dynamic, targeted power delivery system. It sets a minimum clock speed for all cores that the silicon can clock down to in case of thermal throttling. For instance, if your Zen 6 CPU heats up while running a game with Discord and Spotify in the background, FloorPerf will target the cores running background tasks first to maintain the performance of your foreground game.

CPPC will also get another boost in the form of HighestFreq. This allows the OS to access more granular chip data to make better core management decisions. As the name suggests, it pertains to maintaining high clock speeds on the cores running a foreground task. The OS will be aware of exactly which core can boost the highest and maintain that speed the longest, allowing it to assign a game's main rendering thread to the fastest cores while pushing background apps to more power-efficient ones.

Eliminating Latency from GPU Waits

In conjunction with this, Zen 6 is also seemingly getting a per-core EPP boost. EPP stands for Energy Performance Preference and is supposed to fix core parking issues caused by momentary bottlenecks. For example, if the CPU is waiting for the GPU to render the next frame, clock speeds for active cores might drop and struggle to ramp back up in time. The EPP boost is supposed to identify active cores and individually keep them in high-performance mode to eliminate any wait times.

Memory Bandwidth Control

Lastly, Zen 6 is reportedly introducing PQOS Global Bandwidth Enforcement and an updated IBS Memory Profiler. Both target memory bandwidth with the goal of maximum stability. The former is responsible for allocating RAM to background tasks, ensuring their usage stays under the limit for foreground priority. The latter will limit L3 cache access to background tasks when it detects that those tasks are slowing down the foreground application.

As you can tell, all these optimizations are supposed to work together and harmonize into a more efficient processor. Of course, none of this is confirmed yet, and there's a lot that could be gated behind product segmentation. We could see some features only on high-end parts, while some are limited to mobile; there's no telling at the moment.