AMD in Depth 2026: AMD Confirms EPYC and Helios Roadmaps Through 2030
At the AMD in Depth 2026 keynote, the company provided a clear vision for its server and data center ambitions, outlining a roadmap that extends all the way to 2030. The strategy focuses on a synchronized evolution between EPYC server processors and the Helios rack platform, aiming to address the growing demands of traditional data centers and the rapidly expanding AI infrastructure market.
The immediate focus is the sixth generation of EPYC, codenamed Venice. Built on the upcoming Zen 6 and Zen 6c architectures, Venice is expected to arrive in 2026. AMD aims to push the boundaries of core density and memory bandwidth with this release, targeting up to 256 cores (512 threads). Notably, Venice is slated to be the first generation to utilize a 2-nm manufacturing process and will introduce support for PCIe 6.0 and MRDIMMs (Multi-Rank DIMMs). To cater to specific workloads, AMD plans to offer specialized variants, including Venice-X, which will feature additional 3D V-Cache, and Verano, designed specifically as an efficient host processor for AI accelerators.
A Decade of Roadmap: From Venice to Ravenna
AMD's long-term roadmap reveals a structured progression for its server lineup. Following the current fifth-generation Turin (Zen 5/Zen 5c) architecture, the company's timeline is as follows:
Integrated Infrastructure: The Helios and Instinct Connection
A key pillar of AMD's strategy is the tight integration between its silicon and complete rack solutions. The Helios rack platform will evolve in lockstep with the EPYC generations: Helios Gen 1 will launch in 2026 alongside Venice, followed by Gen 2 with Florence in 2028, and Gen 3 with Ravenna around 2030. This approach is designed to provide highly integrated server infrastructures. Furthermore, AMD is developing Instinct accelerators to be deployed within these Helios racks, creating a cohesive ecosystem for high-performance computing and AI workloads.
While the roadmap provides a clear technological trajectory, the true test for AMD will be in real-world implementation. As competition intensifies from Intel's upcoming Xeon generations and ARM-based solutions like NVIDIA's Vera, AMD's success will depend on whether these architectural improvements—specifically in energy efficiency and memory bandwidth—translate into lower total cost of ownership (TCO) for large-scale AI and cloud providers.
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